I Want Performance! On SIMD and Caches and Data Structures
Tomorrow (November, 26th) we'll have our next C++ user group meeting. (15:00 in 0|200 at FIAS)
I (Matthias Kretz) have prepared a talk on “I Want Performance! On SIMD and Caches and Data Structures”:
Computers have increased significantly in compute performance in recent years. But much of that increase is not visible to the typical codes that were written in the 90s -- or using the same approaches that were valid then. Besides the obvious requirement to use all cores there are two major issues that sometimes are neglected if we want to make full use of our CPUs:
Memory access patterns and SIMD instructions.
Memory is slow compared to the CPU, and we therefore have to avoid memory access latencies as much as possible. I will give a quick overview on the cache hierarchy and then show some dos and don'ts.
Most of our codes process many different inputs with the same algorithm. CPUs can execute such data-parallel problems efficiently with SIMD instruction, which execute multiple operations in a single instruction. I will introduce the Vc library, that can be used to express such data-parallelism in your code.
Finally I will put both together and discuss some examples for creating data structures that are suitable both for SIMD processing and are still cache efficient.
Following the talk we will have time for open discussion on C++ topics. So, if you have a C++ programming question, bring it along!